The present invention relates to a semiconductor device and a method for manufacturing it, and specifically relates to a semiconductor device that exerts high drivability by appropriately adjusting the conductivity of a carrier in a channel region of an MIS (Metal Insulator Semiconductor) transistor.
In various methods for increasing drivability of an MIS transistor, there is a method of increasing a drain current as a drive current. Of several measures of determining the drain current, carrier mobility is listed.
In general, it is known that the carrier mobility can be changed in such a manner that scattering rate or an effective mass of the carrier is changed by changing the lattice constant of atoms composing a semiconductor substrate.
Under the circumstances, a technique has been proposed in which the mobility of the carrier passing through the lattices is changed in such a manner that a film having tensile stress is disposed on an MIS transistor to increase the lattice constant of silicon atoms in a channel region of the transistor.
A conventional semiconductor device which focuses attention on the carrier mobility in the channel region will be described below with reference to FIG. 12. FIG. 12 is a section of a structure of a main part of the conventional semiconductor device.
As shown in FIG. 12, an NMOS (N-type channel Metal Oxide Semiconductor) region 503 defined by an element isolation 502 and including a p-type well is formed in a semiconductor substrate 501 made of, for example, silicon. A gate insulating film 511 and a gate electrode 512 are formed in the upward order on the NMOS region 503. Further, n-type source/drain diffusion regions 517 serving as impurity diffusion layers to which an n-type impurity ion such as arsenic is implanted are formed in the NMOS region 503. Each n-type source/drain diffusion layer 517 includes an n-type extension diffusion layer 516 which is formed in a region below each side face of the gate electrode 512 and of which junction depth is comparatively shallow. Sidewalls 513 made of SiN are formed at the side faces of the gate insulating film 51 and the gate electrode 512. A silicide layer 514 is formed on the gate electrode 511 and the n-type source/drain diffusion layers 517. Over the entirety of the semiconductor substrate 501, a liner film 530 made of a silicon nitride film having tensile stress and formed by LP-CVD is formed so as to cover the element isolation 502, the gate electrode 512, the sidewall 513, and the silicide layer 514 (see, for example, Japanese Patent Application Laid Open Publication No. 2002-198368A). Herein, the silicon nitride film having tensile stress means a silicon nitride film which exerts tensile stress on a channel region in the direction of the gate length.
In the conventional semiconductor device shown in FIG. 12, the tensile stress that the liner film 530 has increases the lattice constant of the silicon atoms composing the channel region of the semiconductor substrate 501.
However, the sidewall 513 formed on each side face of the gate insulating film 511 and the gate electrode 512 inhibits the tensile stress that the liner film 530 has from being transmitted effectively to the channel region of the semiconductor substrate 501, attaining an insufficient increase in lattice constant of the silicon atoms in the channel region of the semiconductor substrate 501. As a result, the carrier mobility increases insufficiently.